Hardware Drivers Reference¶
This document provides a technical overview of the hardware drivers implemented in TilekarOS.
1. VGA & TTY Driver¶
The VGA driver manages the text-mode buffer at 0xB8000.
Features:¶
- Scrolling: Moves the entire screen up when the bottom is reached.
- Color Support: Supports 16 foreground and 16 background colors.
- Hardware Cursor: Updates the blinking underscore using VGA I/O ports.
- Serial Logging: Mirrors all output to the COM1 Serial Port (
0x3F8) for easy debugging.
2. PS/2 Keyboard Driver¶
Source Files: keyboard.c, keyboard.h
The keyboard driver handles input from a standard PS/2 keyboard using IRQ 1.
Features:¶
- Scancode Mapping: Translates raw PS/2 Set 1 scancodes into ASCII characters.
- Modifier Tracking: Tracks the state of Shift, Ctrl, Alt, and Caps Lock.
- Buffer API: Provides
keyboard_getchar()which yields until a key is pressed.
3. Programmable Interval Timer (PIT)¶
Source Files: timer.c, timer.h
The PIT generates periodic interrupts at a fixed frequency (default: 1000Hz).
The Trigger System:¶
TilekarOS features a "Trigger" system that allows functions to be scheduled to run every X ticks.
- Preemption: The scheduler uses a trigger to preempt tasks every 100ms.
- Timekeeping: Global ticks counter since boot.
4. PCI Bus Driver¶
The PCI driver enumerates devices on the PCI bus using I/O ports 0xCF8 (Address) and 0xCFC (Data).
Features:¶
- Device Enumeration: Scans all 32 devices on each of the 256 buses.
- Vendor/Device ID: Identifies hardware manufacturers and models.
- Class/Subclass: Determines device types (e.g., Storage Controller, Display Adapter).
5. ATA (IDE) Disk Driver¶
The ATA driver provides access to IDE hard drives using both PIO (Programmed I/O) and DMA (Direct Memory Access) modes.
Features:¶
- LBA28 Support: Supports disks up to 128GB.
- Bus Master DMA: Uses the PCI Bus Master IDE (BMIDE) interface for high-speed transfers.
- PRDT Management: Automatically manages Physical Region Descriptor Tables for DMA transfers.
- Interrupt Driven: Uses IRQ 14 (Primary) and IRQ 15 (Secondary) for asynchronous completion.
- Fallback Mechanism: Automatically falls back to PIO mode if DMA is unavailable.
DMA Implementation:¶
- PCI Configuration: The kernel enables "Bus Mastering" in the PCI Command register for the IDE controller.
- PRDT Setup: A Physical Region Descriptor Table is prepared, pointing to a physically contiguous DMA buffer.
- BMIDE Control: The BMIDE Command register is used to start/stop the transfer, while the Status register reports completion or errors.